1. Field of the Invention
The present invention relates generally to semiconductor integrated circuits, and more specifically to the formation of contact vias in an integrated circuit.
2. Description of the Prior Art
In semiconductor integrated circuits, formation of interconnect layers is important to the proper operation of these devices. Interconnect signal lines make contact with lower conductive layers in the integrated circuit through vias in an insulating layer. For best operation of the device, the lower conductive layers should not be damaged during formation of the contact via.
Various interlevel insulating layers are deposited on the integrated circuit during formation of the device. These layers separate the conductive layers from each other. One method to form contact vias through these insulating layers utilizes a resist layer to define the via locations. An anisotropic etch is then performed to open the vias. During the anisotropic etch, however, polymers are created from the resist and the etch chemistry, and adhere to the sidewalls of the via. These polymers need to be removed so that proper contact is made in the via between the conductive layers.
As known in the prior art, the polymers are removed or dissolved through the use of a solvent, acid or plasma etch. During this process, however, a substantial amount of the underlying aluminum conductive layer can be removed. Additionally, the acid or plasma etch can remove some of the insulating layer, which enlarges the size of the via.
Therefore, it would be desirable to provide a technique for forming contact vias in integrated circuits without damaging the underlying conductive layers or enlarging the size of the via.